The present invention relates to a method for driving an LCD device comprising a large size, high resolution color LCD panel and to a driving circuit for the LCD.
In general, an LCD crystal display device comprises an LCD panel, a scanning signal circuit for supplying a scanning signal to the LCD panel, and a liquid crystal drive circuit for supplying an image signal to the LCD panel.
The above LCD panel comprises a scanning signal line and an image signal line which is perpendicular to the scanning signal line and connected to the liquid crystal drive circuit. The scanning signal lines are disposed in parallel with one another, and connected to the scanning signal circuit.
Furthermore, the LCD panel comprises pixels arranged in matrix pattern such that the scanning signal line and the image signal line serve as boundary lines. On each crossing part of the scanning signal line and image signal line, there is provided a TFT (thin film transistor) as an active element.
The LCD device can display a prescribed image signal by (1) giving a plurality of image signals outputted from the liquid crystal drive circuit to each image signal line, (2) selecting the specified scanning signal line by the scanning signal outputted from the scanning signal circuit, (3) turning ON only the TFT connected to the selected scanning signal line, (4) applying the respective predetermined image signal only to the pixel including TFT in ON state, (5) controlling transmittance of light of liquid crystal of each pixel by the potential difference of the applied predetermined image signal.
In general, in the large size LCD device having high resolution color LCD panel, in order to maintain the operating frequency of the image data which is a signal inputted to the liquid crystal drive circuit to a level lower than the highest frequency (maximum operating frequency) in the range in which the liquid crystal drive circuit can be operated, there may be a case of providing the liquid crystal drive circuits for example on and under the LCD panel.
In the conventional LCD device as described above, when the number of pixels is increased to improve resolution, the time for the TFT to charge the image signal is restricted to be short. Also, when the size of screen is enlarged (that is, large screen is used), length of line such as the image signal line, scanning signal line requires to be long, and the wiring load becomes large. Accordingly, there arises such problems that the wave forms of the image signal and scanning signal are distorted, or the transmission speed of the image signal on the image signal line or transmission speed of the scanning signal on the scanning signal line becomes slow. Accordingly, due to the mutual effects of the preceding and succeeding scanning signal or image signal, the image signal at the time of application to the pixel results in difference from the prescribed amount.
As mentioned above, when the number of pixels is increased and at the same time the size of screen is enlarged, there arises crosstalk which shows variation in the brightness of the pixels surrounding the pattern and defective display such as flicker in which the brightness of the pixels around the pattern varies at times, and the quality of display is remarkably lowered.
With respect to the driving method for the LCD device in consideration of the prevention of degradation of display quality, there is an alternating current driving method. The alternating current driving method is a method of driving the LCD device while inverting (changing) the polarity of the image signal in a predetermined cycle period. In the present specification, the polarity of the signal means the polarity of the voltage of the signal.
In case of adopting the alternating current drive method, in general, the polarity of the output from the odd number from the image drive (hereinafter referred to simply as xe2x80x9codd number outputxe2x80x9d) is different from the polarity of the output from the even number from the image drive (hereinafter referred to as xe2x80x9ceven number outputxe2x80x9d). In order to change the polarity of the odd number output from the polarity of the even number output, a drive circuit for outputting the polarity inversion signal capable of optionally inverting the polarity (hereinafter to be referred to as xe2x80x9cpolarity inverting drive circuitxe2x80x9d) is provided, for example, in the timing control circuit.
FIG. 12 is an illustrative view showing an example of conventional liquid crystal drive circuit. In FIG. 12, the part 1 shows a liquid crystal drive circuit, and 101 to 106 show the output terminals of the liquid crystal drive circuit 1. In FIG. 12, there are shown only six output terminals of the liquid crystal drive circuit 1. The first output terminal, third output terminal and (2 m+1)-th output terminal denoted by numerals 101, 103 and 105 are the odd number output terminals to output the odd number outputs. Furthermore, the second output terminal, fourth output terminal and (2 m+2)-th output terminal denoted by numerals 102, 104 and 106 are the odd number output terminals to output the odd number outputs, wherein m is 0 (Zero) or natural number.
FIG. 13 is an illustrative view showing the polarity inversion signal, and examples of the polarities of the odd number output and even number output outputted from the liquid crystal drive circuit shown in FIG. 12. In FIG. 13, there are shown from the top the polarities of polarity inversion signal, odd number output, and even number output. In FIG. 13, the horizontal direction shows time, and the vertical direction shows voltage with respect to the polarity inversion signal only.
In FIG. 13, when the polarity inversion signal is in high level, the polarity of the odd number output is positive, and when the polarity inversion signal is in low level, the polarity of the odd number output is negative, and the polarity of the even number output is negative.
FIGS. 14(a) and 14(b) and FIGS. 15(a) and 15(b) are the illustrative views showing an example of the concept of the line relating to the pixels of the conventional LCD panel. FIG. 14(a) is an illustrative view showing an LCD device in n frame (n is 0 (Zero) or natural number), and FIG. 14(b) is an illustrative view showing an LCD device in n+1 frame. FIG. 15(a) is an illustrative view showing an LCD device in n+2 frame, and FIG. 15(b) is an illustrative view showing an LCD device in n+3 frame.
In FIGS. 14(a) and 14(b) and FIGS. 15(a) and 15(b), the part 1a shows an upper liquid crystal drive circuit provided on the upper side of the LCD panel, numeral 1b shows a lower liquid crystal drive circuit provided on the under side of the LCD panel, numeral 2 shows a scanning signal circuit, and numeral 4 shows a timing control circuit for controlling the timing for varying the voltage of the signal outputted from the upper liquid crystal drive circuit 1a, lower liquid crystal drive circuit 1b, and scanning signal circuit 2 to the predetermined amounts. Furthermore, numeral 11a shows an image signal line connected to the output terminal of the upper liquid crystal drive circuit 1a, 11b shows an image signal line connected to the output terminal of the lower liquid crystal drive circuit 1b, and numeral 12 shows a scanning signal line connected to the output terminal of the scanning signal circuit 2. The symbol xe2x80x9c+xe2x80x9d or xe2x80x9cxe2x88x92xe2x80x9d shown in the white circle schematically shows the polarity, i.e., positive or negative, of the image signal to be applied to the pixel. Furthermore, the upper image signal line 11a and image signal line 11b labeling xe2x80x9cRxe2x80x9d are the signal lines dealing with the pixels for red color, the upper image signal line 11a and lower image signal line 11b labeling xe2x80x9cGxe2x80x9d are the signal lines dealing with the pixels for green color, and the upper image signal line 11a and lower image signal line 11b labeling xe2x80x9cBxe2x80x9d are the signal lines dealing with the pixels for blue color, respectively.
The LCD device comprises an LCD panel, an upper liquid crystal drive circuit 1a, a lower liquid crystal drive circuit 1b, a scanning signal circuit 2, an upper liquid crystal drive circuit 1a, a lower liquid crystal drive circuit 1b, and a timing control circuit 4 for controlling the timing for varying the voltage of the signal outputted from the scanning signal circuit 2 to a predetermined voltage. The above LCD panel comprises an upper image signal line 11a, a lower image signal line 11b and a scanning signal line 12, pixels disposed in matrix with the boundary lines of the upper image signal line 11a, lower image signal line 11b and scanning signal line 12, and TFTs (not illustrated) provided at each cross point of the upper image signal line 11a and scanning signal line 12 and at each cross point of the lower image signal line 11b and scanning signal line 12.
FIGS. 16(a) to 16(c) and FIGS. 17(a) and 17(b) are timing charts showing the signals to be used for driving the LCD devices shown in FIGS. 14(a) and 14(b) and FIGS. 15(a) and 15(b). In FIGS. 16(a) to 16(c) and FIGS. 17(a) and 17(b), the abscissa shows the time, and the ordinate shows the voltage.
In FIG. 16(a) there are shown from the top switching timing signal for the first polarity inversion signal and switching timing signal for the second polarity inversion signal. The signals are continued in order of, for example, n frame, (n+1) frame, . . . , wherein a shows the time of change to n frame, b the time of change to (n+1) frame, c the time of change to (n+2) frame, and d the time of change to (n+3) frame.
In FIG. 16(b), there are shown from the top the first polarity inversion signal and the second polarity inversion signal in n frame. In FIG. 16(c), there are shown from the top the first polarity inversion signal and the second polarity inversion signal in (n+1) frame. In FIG. 17(a), there are shown from the top the first polarity inversion signal and the second polarity inversion signal in (n+2) frame. In FIG. 17(b), there are shown from the top the first polarity inversion signal and the second polarity inversion signal in (n+3) frame. The points a1, b1, c1, and d1 show the time when the first scanning signal line is selected in one frame (i.e., when the first line is selected in each frame). The points a2, b2, c2, and d2 show the time when the second scanning signal line is selected in one frame. The points a3, b3, c3, and d3 show the time when the second scanning signal line is selected in one frame. The points a3, b3, c3, and d3 show the time when the third scanning signal line is selected in one frame. The points a4, b4, c4, and d4 show the time when the fourth scanning signal line is selected in one frame. The points a5, b5, c5, and d5 show the time when the fifth scanning signal line is selected in one frame.
The first polarity inversion signal is a signal for controlling the polarity of the image signal to be applied to the pixel through the upper image signal line (hereinafter to be referred to as xe2x80x9cupper image signalxe2x80x9d). On the other hand, the second polarity inversion signal is a signal for controlling the polarity of the image signal to be applied to the pixel through the lower image signal line (hereinafter to be referred to as xe2x80x9clower image signalxe2x80x9d). The switching timing signal for the first polarity inversion signal is a signal for controlling the polarity of the first polarity inversion signal in a1, b1, c1 or d1, and the switching timing signal for the second polarity inversion signal is a signal for controlling the polarity of the second polarity inversion signal in a1, b1, c1 or d1. The polarities of the first polarity inversion signal and the second polarity inversion signal vary in the predetermined patterns in one frame. For example, in FIG. 16(b), FIG. 16(c), FIG. 17(a) and FIG. 17(b), the polarity is inverted when the scanning signal line of the first, third, fourth, or fifth is selected in each frame. Whether the polarity inverts from the high level to the low level or inverts from the low level to the high level depends on the polarities of the first polarity inversion signal and the second polarity inversion signal in a1, b1, c1 and d1.
The output terminal of the upper liquid crystal drive circuit 1a is connected to the image signal line in the odd number counted from the left side (hereinafter to be referred to as xe2x80x9cupper image signal linexe2x80x9d) 11a. Also, the output terminal of the lower liquid crystal drive circuit 1b is connected to the image signal line in the even number order counted from the left side (hereinafter to be referred to as xe2x80x9clower image signal linexe2x80x9d) 11b (referring to FIGS. 14(a) and 14(b) and FIGS. 15(a) and 15(b)).
In the conventional LCD device driving method, the polarities of the first polarity inversion signal and the second inversion signal are inverted in selecting the scanning signal line of the first by frame, so that the image signals of the same polarity are not always applied to the liquid crystals of each pixel (referring to FIG. 16(a)).
In the conventional method for driving LCD device, the polarities of the first polarity inversion signal and the second inversion signal are inverted in selecting the scanning signal line of the first by frame, by the switching timing signal for the first polarity inversion signal and the switching timing signal for the second polarity inversion signal. However, in case of classifying into groups by the pixel to which the image signals of the same polarity are applied, the pixels which constitute each group do not change even when the frame is changed. Consequently, an electric field is generated in horizontal direction (in the direction parallel with the plane including the scanning signal line and image signal line) between the adjacent groups. In the area in which the horizontal electric field has been generated, no predetermined image is obtainable, and the display quality is degraded. Generation of electric field in the horizontal direction is not visually recognized if it is thinned by frame, but in the conventional case under review in which the voltages in the horizontal direction are generated between the frames in the same place at all times, there is a problem of high possibility for the electric field to be visually recognized.
The present invention has been made to solve the problems as above, and object of the present invention is to provide a driving method for an LCD device comprising a large size, high resolution color LCD panel, in which the display quality can be improved.
One aspect of the present invention is directed to method for driving an LCD device comprising steps of:
applying one of upper image signal outputted from an upper liquid crystal drive circuit and lower image signal outputted from a lower liquid crystal drive circuit to a plurality of pixels of a selected line by scanning signal outputted from a scanning signal circuit out of the plurality of pixels disposed in matrix to display a predetermined image;
wherein there exist in mixture a case where the polarities of the upper image signal and the lower image signal are inverted every one vertical period and a case where the same polarity is maintained.
Another aspect of the present invention is directed to method for driving an LCD device comprising steps of:
applying one of upper image signal outputted from an upper liquid crystal drive circuit and lower image signal outputted from a lower liquid crystal drive circuit to a plurality of pixels of selected line by scanning signal outputted from a scanning signal circuit out of a plurality of pixels disposed in matrix to display a predetermined image;
wherein, in selecting a first line in each frame, polarities of the upper image signal and the lower image signal are changed every two frames, and the timing for changing the polarity of the upper image signal is displaced at the rate of one frame to the timing for changing the polarity of the lower image signal.
Another aspect of the present invention is directed to a driving circuit for LCD device comprising at least an upper liquid crystal drive circuit, a lower liquid crystal drive circuit, a scanning signal circuit, a timing control circuit and a vertical synchronization signal converting circuit, said vertical synchronization signal converting circuit being a drive circuit of LCD for outputting a switching timing signal for a first polarity inversion signal and a switching timing signal for a second polarity inversion signal, wherein said switching timing signal for a first polarity inversion signal and said switching timing signal for a second polarity inversion signal are outputted by said vertical synchronization signal converting circuit such that in n frame polarity of a first polarity inversion signal inputted to said upper liquid crystal drive circuit is made inverted to polarity of a second polarity inversion signal inputted to said lower liquid crystal drive circuit; and in n+1 frame said polarity of a first polarity inversion signal inputted to said upper liquid crystal drive circuit is made inverted to said polarity of a second polarity inversion signal inputted to said lower liquid crystal drive circuit.